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PCB Microstrip Impedance and Delay Calculator

Controlled impedance traces are a common reason a quote comes back with extra cost. This calculator gives a fast, defensible first-pass Z0 and delay for a surface microstrip before you send a stackup to the fabricator.

Your numbers

mm
mm

Prepreg or core thickness between trace and plane.

mm

35 um is 1 oz finished copper.

Check the laminate datasheet at your operating frequency.

mm

Your results

Characteristic impedance Z0
53.5191
Ohms.
Total trace delay
440.926
Picoseconds over the trace length.
Width to height ratio
1.5
The formula is intended for roughly 0.1 to 2.0.
Propagation delay
5.5116
Picoseconds per mm.

The IPC-2141 closed-form formula is accurate to a few percent only inside its w/h range. For fabrication, confirm impedance with your fabricator's field solver and stackup, and specify tolerance on the drawing.

Save results:

Z0 vs trace width

Sweeps Trace width from 0.1 to 0.8, holding your other inputs fixed.

Link stackups to your item master

Optional: talk through carrying PCB spec data into your ERP.

Optional. The tool and every export work without this. No spam.

How to use it

Enter the trace width, the dielectric height between the trace and its reference plane, the finished copper thickness and the laminate Er. The calculator returns Z0 and the delay per mm. Adjust the width until Z0 reaches your target, such as 50 ohm single ended, then give the width and stackup to the fabricator for field-solver confirmation.

The formula behind it

The IPC-2141 surface microstrip approximation is Z0 = 87 / sqrt(Er + 1.41) x ln(5.98 h / (0.8 w + t)). Delay per unit length follows from the effective dielectric constant, tpd = 85 x sqrt(0.475 Er + 0.67) picoseconds per inch, which converts to about 3.35 ps per mm times the same square root factor.

  • Wider trace lowers Z0
  • Thicker dielectric raises Z0
  • Higher Er lowers Z0 and slows the signal
  • Solder mask over the trace lowers Z0 by a few ohms

Reading the result

With 0.3 mm width, 0.2 mm dielectric, 35 um copper and Er 4.3, the result is near 53 ohm. A typical tolerance for fabricated controlled impedance is plus or minus 10%, and tighter tolerances cost more. Use the delay output to length-match differential pairs and memory buses in time rather than only in millimeters.

Common mistakes

Using nominal Er from a datasheet at 1 MHz when your signal runs at gigahertz gives errors. Another mistake is forgetting that prepreg thickness after lamination is less than the raw value because resin flows into copper-free areas. Always ask the fabricator for the pressed thickness used in their solver.

Frequently Asked Questions

Does this work for stripline?

No. Stripline sits between two planes and uses a different formula. This calculator covers surface microstrip only, with an air and mask interface on one side of the trace.

What width gives 50 ohm on FR-4?

It depends on dielectric height. For about 0.2 mm dielectric and Er 4.3, a width near 0.35 mm is typical. For thicker dielectrics the trace must be wider, so always run the numbers for your stackup.

How accurate is the closed-form formula?

It is usually within a few percent for w/h between 0.1 and 2.0, but field solvers account for etch trapezoid shape, mask and roughness. Use this for planning and a field solver for release.

Why is delay shown?

Signal timing depends on the effective dielectric constant. Delay lets you match trace lengths for clocks and buses in picoseconds, which is the unit signal integrity rules use.

Netray can connect your PCB specifications and fabricator quotes to the ERP item master so impedance requirements travel with the part.

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